1. Technical Field
The present invention relates to image collection and comparison and more particularly to systems and methods for aligning layout designs with measured images.
2. Description of the Related Art
Time-integrated (static) images of both switching and leakage emission are a key tool for testing and characterizing modern VLSI circuits. Common to many techniques is the necessity of precisely correlating an emission pattern with a layout of the circuit under test. In this way, emission spots can be associated with a certain transistor, gate, sub-circuit and properly interpreted, for example, to reconstruct a logic state of the gate. Achieving this precise registration is not trivial, often requires a lot of custom manual work and is prone to error and user interpretation.
In some other cases, for example, an area suspected in an emission image needs to be traced back to the correct location in the chip layout with very precise registration. Again, such a task of tracing back a small portion of the chip emission acquired at high magnification to its unknown location in a chip layout is not trivial and very time consuming even when done manually by an experienced tool operator.
For navigation purposes, this problem is approached in some tools by using a three (or more) point alignment. In particular, some specific locations in the layout and in the light reflected pattern image of the chip are selected and correlated so that the entire layout could be transformed using linear transformations and drawn over the reflected light pattern image. Although, this allows for simple navigation of the chip, a precise alignment at the local level is never achieved. In other cases, the reflected light pattern image is correlated with the layout while the tool is calibrated so that the emission image is aligned with the reflected light image. Unfortunately, the correlation is rarely realized due to sample thickness variations, temperature changes, material differences, etc. Even if the layout is perfectly aligned with the pattern image, it is not well aligned with the emission image. as the quality of reflected light images is insufficient for a precise sub-micron alignment with a layout.